From 3D XPoint to Optane: Why a New Memory Category Never Stuck

In late July 2015 Intel and Micron said they had created the first new memory category in twenty-five years. It was called 3D XPoint and was framed as a breakthrough for instant access to huge data sets. As a persistent memory akin to NOR or NAND it would keep data without power, yet claims went far beyond: up to a thousand times the speed and endurance of NAND and roughly ten times the density of conventional memory. A single die could hold 128 gigabits. The technology would soon become Intel's Optane brand and the industry began to expect a new era.

Physics Lesson: How a Crystal Becomes Glass to Write a Bit

DRAM and flash are charge-based, one holding electrons in a transistor's floating gate, the other in a thin capacitor. Phase-change memory relies on a different principle: a material that can switch between distinct phases. In its crystalline state atoms sit in an orderly, repeating lattice, current flows easily and resistivity is low. If the film is melted and quenched quickly, atoms freeze into a random, glass-like amorphous phase where resistivity jumps sharply; that transition is called RESET. The reverse, SET, returns the cell to crystal either by melting and slowly cooling or by heating the amorphous solid directly at a well-chosen temperature below melting. That SET step is often the speed bottleneck. Heat can be generated in several cell designs, the best-known being the mushroom cell where a cylindrical Joule heater touches the phase-change film and its spread gives the mushroom silhouette. The resistivity contrast between crystal and glass can span three to four orders of magnitude, so a bit is read by sensing resistance. The science traces to the late 1960s when Stanford Ovshinsky discovered phase transitions in chalcogenides, compounds with at least one chalcogen such as tellurium alloyed with germanium or antimony. Seeing memory potential, Ovshinsky and his company Energy Conversion Devices began chasing a prototype.

Early Market Attempts: A Read-Mostly Memory

The first commercial push arrived in 1970 when R. G. Neale and D. L. Nelson of Energy Conversion Devices together with Intel's Gordon Moore introduced the Read-Mostly Memory in Electronics magazine. It was pitched as a middle ground between RAM and ROM for data that is read often but rarely rewritten, like lookup tables. Each cell paired a silicon diode with the Ovonic film on a silicon substrate in a simple X-Y array. With minimum features around ten micrometers the cells demanded high switching power, SET took milliseconds, endurance was low, and as DRAM capacities grew and EPROM alternatives appeared the product faded; asked years later, Moore said he did not recall the paper at all.

A second try came in 1978 from Burroughs with a roughly 1024-bit device that suffered reliability shortcomings and never became competitive, after which the field went quiet for a while. Interest returned in the late 1990s when chalcogenides proved useful for rewritable optical discs, where the crystalline state reflects more than the amorphous and a laser can write by heating the surface. Moore's Law also helped: smaller cells need smaller programming currents and far less energy. Seeing those trends, Micron co-founder Ward Parkinson and longtime CTO Tyler Lowrey joined Ovshinsky's team to start Ovonyx in 1999, followed by a major Intel Capital investment and license in February 2000.

From Optical Discs Back to Silicon

In 2001 Intel promoted Ovonic Unified Memory on a 180-nanometer process, using a resistor to heat for SET and RESET and a bipolar transistor for access. The pitch was elegant: just add a chalcogenide layer on top of standard silicon. The driver was NOR flash. Intel was the leading NOR vendor, but scaling had made charge retention hard as cells shrank. OUM still required costly tellurium and large currents and remained research-grade, yet Intel's marketing revived broad interest and Samsung and STMicroelectronics licensed the Ovonyx technology for their own efforts.

What ultimately eroded NOR was not PCM but NAND. With denser packing and a forgiving cost-per-bit curve, NAND moved into media players and phones and pushed NOR sales down nine percent year over year in 2007. In 2008 Intel merged its NOR business with STMicroelectronics' flash unit into the Swiss company Numonyx, backed by Francisco Partners and a bank loan. Uninterested in a shrinking NOR market dominated by Spansion and Samsung, Numonyx bet on phase-change memory as a breakout that could combine mass storage with fast random access. Just before the spinoff, Intel had already shown the 128-megabit Alverstone prototype on 90 nanometers, hailed by future CTO Ed Doller as the most notable persistent-memory leap in four decades.

By the late 2000s almost every memory maker had a PCM program. In 2008 IBM demonstrated cells as small as three by twenty nanometers as a candidate for storage-class memory, the niche imagined between hard drives and solid-state with near-drive cost and near-DRAM latency. The use case was not the desktop but phones that prize persistence and data centers that burn power and space holding hot data in DRAM because disks are too slow. The idea blurred storage and working memory, and a widely cited 2009 paper from Microsoft and Carnegie Mellon even sketched an architecture that could substitute PCM for DRAM. Momentum felt real.

A Mobile Dream Meets a 3D NAND Wall

The go-to-market plan targeted mobile, where PCM could replace NOR that holds boot code and also store user data while enabling instant-on behavior. The drawback was price: far above NAND, the hope was that mobile volumes would drive cost down. Vendors were pitched PCM plus DRAM instead of NOR plus NAND plus DRAM, or at least PCM for hot NAND data such as SQL stores. The window seemed plausible because NAND was moving from single-level to multi-level cells, gaining capacity but losing performance. Samsung seized it, announcing a 512-megabit PRAM on 60 nanometers in 2009 and claiming more than twenty percent power saving when paired with DRAM, while Numonyx showed prototypes aimed at one gigabit by the end of 2010.

In February 2010 Micron bought Numonyx for about 1.2 billion dollars in stock and inherited the PCM portfolio. In July 2012 a one-gigabit part on 45 nanometers arrived, paired with 512 megabits of DRAM to power feature phones like the Nokia Asha, with smartphones on the roadmap. The reprieve was brief: in August 2013 Samsung started mass production of 24-layer 3D NAND, unleashing the steepest cost-per-bit decline the industry has ever seen and erasing the core value case for mobile PCM. In January 2014 Micron pulled the mobile part after a strategic review, noting that customers preferred the familiar NAND plus DRAM pairing, but hinted at a future product with better cost and power.

That future arrived a year later when Intel and Micron jointly unveiled 3D XPoint, positioned between NAND and DRAM as fast like DRAM but persistent like NAND. The promise for data centers was straightforward: rapid access to enormous data sets without buying vast DRAM pools. Micron president Mark Adams framed processor wait for long-term storage as one of the biggest bottlenecks in modern computing and described the new category as enabling entirely new applications built on instant data availability. Both firms stayed vague, speaking only of a bulk material change and resistance, explicitly saying it was not ReRAM; patent sleuths quickly pointed to phase change, and many read the secrecy as an attempt to avoid the technology's earlier stigma. The base technology would branch into two brands, Micron's QuantX and Intel's Optane.

Two Roads: From Consumer Accelerator to Persistent DIMM

Micron aimed QuantX squarely at the data center. In August 2016 it sketched a price of about half of DRAM per gigabyte but four to five times NAND, suggesting operators could trim DRAM and augment NAND. Executive Jon Carter voiced outsized enthusiasm, saying capacity for the first couple of years was already accounted for and that major server and storage vendors were lining up for supply. Launch slipped, two years passed with no QuantX SSD or DRAM replacement on the market, and in July 2018 the partners agreed to complete the second generation together and then separate. Reports pointed to strategy divergence: Intel sought consumer PC volumes to help fill the fab and drive wafer cost down, while Micron preferred to go straight to the data center, with Carter noting that consumer systems had limited appetite to pay a four-to-five-times NAND premium for low latency and persistence.

In October 2018 Micron paid 1.5 billion dollars for Intel's share of their shared Utah fab, IM Flash Technologies, a site the pair had backed with six billion dollars in total, and Intel took its XPoint manufacturing in-house. A year later Micron showed the X100 SSD, boasting more than nine gigabytes per second and eight-microsecond latency, yet it appeared as a storage device like NAND rather than a working memory like DRAM. Intel's first Optane product had already shipped in 2017 as a 16 or 32-gigabyte PC accelerator module working with recent CPUs and motherboards to give hard-disk systems SSD-like responsiveness. The company advertised halved boot times, about twenty-eight percent overall speedup and up to sixty-five percent faster game loads. Reviewers stressed it did not replace DRAM or NAND but reduced waits, noted gains varied by application and fell far short of thousand-fold headlines, and often blamed standard NVMe and PCIe interfaces for bottling up the media's strengths. The verdict was that the technology worked but its niche was narrow and confusing to buyers.

Intel's broader plan was a platform play around Xeon. Memory movement in and out of Xeon sockets was seen as a key limiter; the firm sold NAND but not DRAM, and neither solved the bottleneck. A February 2017 investor deck framed NAND as warm data and Optane as hot data, with Intel's manufacturing scale expected to bring costs down. Executive Shannon Poulin laid out the thesis in a 2018 conversation, saying that keeping an entire analytics set or database in memory avoids the trek from CPU to drive and represents not just a faster drive but persistent memory wired directly to the CPU, a different paradigm that the company believed could be delivered economically. The firm had led with the client accelerator and an SSD because bus and software standards already existed and volumes could keep the fab busy, even if those standards capped full performance. The real bet was a DIMM that slots into data-center boards, a field Poulin described as a multi-billion opportunity.

That data-center path was far more demanding. SSD and accelerator modules behave like faster storage and fit with minimal change, but acting as working memory needs new board designs and application changes. The first DIMMs, Optane DC Persistent Memory, arrived in April 2019, four years after the announcement, requiring a compatible Xeon processor, chipset and motherboard. Intel signed integration deals, yet programming remained tricky. Memory Mode pools DRAM and Optane into a volatile space where DRAM caches hot data and Optane extends capacity out of the box, though its value swings with DRAM pricing. The more powerful App Direct mode lets enabled software write persistent data to Optane as if to an extremely fast drive. In normal operation an Oracle or SAP restart must reload data from SSDs or disks, a wait that can stretch to an hour for large databases; with persistence the data survives power cycles and can be accessed far faster, with one directional test citing a 12.5-fold improvement. That is why both database vendors signed on, even though handling persistence forces developers to rethink consistency and recovery, with backups still required. A year later Intel cited 582 proofs of concept, led by SAP HANA and Oracle Exadata for high-performance databases and spanning high-performance computing, infrastructure and AI analytics, but only about forty percent used the more valuable App Direct mode, a shift the company expected would take years. It had imagined broader use for virtual infrastructure, where persistent memory can host more virtual machines per host, yet cloud providers' internal wins leaned toward real-time video and shopping recommendations. Around the same time Intel sold its 3D NAND business to SK hynix for nine billion dollars while keeping Optane, a decision that nonetheless let outsiders back out an implied loss of more than five hundred million dollars for the Optane unit in 2020. In March 2021 Micron said it would stop 3D XPoint development immediately, citing persistent under-utilization of its Lehi, Utah fab costing about four hundred million dollars a year in run-rate, later sold to Texas Instruments. Management pointed to falling 3D NAND prices and the steep software and platform changes data centers would need to extract full value.

Micron's pivot was toward the open Compute Express Link standard, pitched as a way to pool compute, memory and storage and assign resources to processors, GPUs and accelerators as needed, a need magnified by machine learning growth. High Bandwidth Memory and other DRAM-adjacent products also addressed that need, making Optane's CPU-centric niche feel narrow. Losing its partner left Intel as the sole source, a worry for customers uneasy about proprietary, single-sourced memory; observers argued Micron's public exit spoiled years of quiet ecosystem building. Meanwhile DRAM and especially 3D NAND kept getting cheaper and faster, compressing the very gap Optane wanted to own. At the July 2022 second-quarter call, amid a broad miss with revenue down twenty-two percent and a net loss, Intel quietly said it would wind down Optane, canceling near-term products such as the 300 series Crow Pass and placing the portfolio on a path to end of life through 2024 and 2025. The closing reflection is sober: creating a new memory category historically takes decades, flash itself needed twenty years, the modern phase-change revival began in 1999 yet XPoint was only announced in 2015 with products in 2017 and 2019 and in wind-down by 2022. Timing collided with a historic 3D NAND run, cheaper DRAM and an AI boom that centered on GPUs rather than persistent DIMMs. Nostalgia lingers now that DRAM is expensive again, but the product earned its epitaph: trying to be good at many things, it ended up winning at none.